[IEEE 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) - Kanazawa (2013.5.26-2013.5.30)] 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) - Injection control technique for high speed switching with a double gate PNM-IGBT

May 7, 2018 | Author: Anonymous | Category: Documents
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Injection Control Technique for High Speed Switching with a double gate PNM-IGBT Masakiyo Sumitomo, Hiroki Sakane, Kazuki Arakawa, Yasushi Higuchi and Masaki Matsui Research Laboratories, DENSO CORPORATION Nisshin, Aichi, 470-0111, Japan Email: [email protected] Abstract— We proposed a PNM-IGBT [1] that can realize performance close to the theoretical limit shown by Nakagawa, et, al [2, 3]. In that work, we confirmed PNM-IGBT can achieve a very low saturation voltage due to its great injection enhancement effect. However, it is accompanied by a slight increase in turn-off-loss. We believe that we can diminish this increase by our unique control technique. Therefore, in this paper, we propose a fundamentally new IGBT control technique. By combining this control technique and PNM-IGBT, it becomes possible to achieve both a low saturation voltage and fast switching speed. To demonstrate the above hypothesis, we have developed a double gate PNM-IGBT, and confirmed a decrease in turn-off-loss of 30% using this technique. I. INTRODUCTION Si-IGBTs have become one of the most indispensable power devices in the power electronics field, ranging from consumer electronics, industrial motors, bullet trains and hybrid/electric vehicles. Compared with new materials such as GaN and SiC, Silicon has superior reliability and better mass productivity. Therefore, it is necessary to continue performance improvements of Si-IGBTs. On the other hand, the "Theory of Silicon Limits of IGBTs" was shown by Nakagawa et al [2, 3]. According to Nakagawa, it is possible to ensure a considerable saturation voltage reduction comparable to SiC-MOSFETs above the 1200V range. Therefore, the realization of the Silicon Limits is able to contribute not only to the reduction of the saturation voltage, but it can also expand the scope of Si-IGBTs. However, the proposed structure was extremely difficult to manufacture. DB (Dielectric Barrier) IGBT as one possible solution was confirmed by Takei et al [4]. Then, we proposed a fundamentally new structure PNM-IGBT [1] (that has a high affinity with the gate trench process). Furthermore, we have already confirmed the performance via a prototype exam. It is close to the Silicon Limits (see Fig. 1). In addition, by combining the low injection backside FS structure, we have confirmed that PNM-IGBT can improve the Von-Eoff trade- off (Fig. 2). However, we also reported that it caused Eoff to increase when compared to a conventional trench IGBT with the same Si thickness and backside injection efficiency. A large amount of the storage carrier increased the storage time, decrease the dV/dt and increase Eoff. As a result, decreasing Eoff is limited despite increasing the dI/dt by low efficiency backside injection. Therefore, we aimed to speed up the dV/dt while maintaining low saturation voltage characteristics. To accomplish this, we have to solve the contradiction of requiring an increased storage carrier. In the conduction state, it is effective to achieve a low saturation voltage caused by stored carriers. In the turn-off state, we can achieve fast current interruption by reducing the stored carriers. To achieve both of these, it is necessary to establish a Fig. 1 Relationship between the specific on-resistance and the breakdown voltage Fig. 2 Measured and simulated Vce(sat)-Eoff trade-off relationship Dashed lines show simulation results (Backside injection efficiency is changed) Proceedings of The 25th International Symposium on Power Semiconductor Devices & ICs, Kanazawa 1-3 33 dynamic control technique for changing the amount of stored carrier in the drift region. Fig. 3 shows a conceptual diagram of the idea. This means that we have tried to control the internal carrier distribution using small external signals. Usually, there is no way to change the internal carrier distribution unless we change the device design. II. HOW TO CONTROL THE STORAGE CARRIER However, it is difficult to control the entire amount of the stored carriers in the drift region. This is because it is difficult to provide a mechanism (such as a gate system) on the device backside using current technology. Therefore, the possible solution that we devised is to control the amount of stored carriers on only the surface side as in Fig. 4. For this method to have a sufficiently large effect, it is necessary to realize a very high injection enhancement effect. Therefore, we have adopted the PNM-IGBT which can achieve this. Previously we have demonstrated that the mesa width of PNM-IGBT could change the carrier concentration on the surface side (narrower is higher) [1]. We apply this principle in order to invalidate the career injection effect temporarily. In order to "lower" the injection enhancement effect, we propose that the positive potential (for continuing the on-state) and the negative potential (for lowering the injection enhancement effect) are respectively applied to the adjacent gate. The gate that is given the negative potential can discharge the storage carrier instead of enhancing the injection. Therefore, we were able to demonstrate the same effect as temporarily "widening" the mesa width by this method. III. DEVICE DESIGN AND FABRICATION To demonstrate this idea, we developed a double gate PNM-IGBT (Fig. 5, 6). The production method of the PNM structure is exactly the same as previously reported [1]. A combination of isotropic etching and thermal oxidation can reliably realize very narrow mesa construction. The difference is that the fabrication of the Gate (hereinafter, G) and Control Gate (hereinafter, CG) are isolated and connected to the individual gate pads (see Fig. 6, 7). We can apply different potential to G and CG. The double gate PNM-IGBT consists of a 0.5μm mesa width, 0.4cm2 active area, 4μm gate pitch, 145μm silicon thickness, 65Ω·cm drift region resistivity and FS backside structure(See Fig. 8). Fig. 5 SEM image of a double gate PNM-IGBT Fig. 6 TOP view of a double gate PNM-IGBT Fig. 7 Schematic diagram of the gate wiring Fig.4 Schematic diagram showing the change of the surface-side carrier concentration Fig. 3 Conceptual diagram of this study 34 IV. CHARACTERISTICS In this structure, it is possible to transition to the ON state by both G and CG. Fig. 9 shows the superimposing characteristics of both a Vge-Ice (Vcge=0V, CG is shorted to E) and a Vcge-Ice (Vge=0V, G is shorted to E). The two waveforms are nearly identical. Fig. 10 shows the Vce-Ice waveforms in a blocking state that can be achieved by shorting both G and CG to E. We confirmed the breakdown voltage is greater than 1200V as usual. We were able to confirm an interesting phenomenon of the unique double-gate PNM- IGBT structure in the conduction state. Fig. 11 and 12 display the dependence of its saturation voltage by changing the Vcge. When Vge=Vcge=15V, it exhibits a very low saturation voltage because of its high injection enhancement effect. Next, the saturation voltage continues to rise when the Vcge is lowered while maintaining Vge=15V. This is because the surface carrier concentration continues to decrease. This phenomenon can be confirmed also in device simulation (see Fig. 13). These results mean that CG can change the amount of the drift region carrier. When we apply a negative voltage in CG, a p-type inversion layer is formed along the CG. This is because of the rapid rise in the saturation voltage while the Vcge is negative. In other words, we successfully created a new device that can enhance the internal drift carrier concentration by "Normally ON". Next, we confirmed how the control affects the turn-off waveform. Fig. 14 shows a comparison of the turn-off waveform with and without the control. Eoff was reduced by 30% because of the 40% faster dV/dt. In this situation, the dI/dt does not change substantially. We believe this does not simply reflect a change in the gate capacitance. It is a result of a change in the drift region carrier distribution. Fig. 15 displays the Vce(sat)-Eoff trade-off relationship that is compared with a conventional trench IGBT (the same Si thickness and backside injection efficiency). We can confirm that this control technique can change the characteristics dramatically. Fig. 9 Measured Vge-Ice and Vcge-Ic characteristics Fig. 10 Measured breakdown characteristic Fig. 11 Measured on-state Vce-Ice characteristics (Vcge is changed) n- drift n-FS p-base n+ p+ n+ pol y-S i Ox ide E 145µm6µm p-collector 0.5µm 1µm G CG C n- drift n-FS p-base n+ p+ n+ pol y-S i Ox ide E 145µm6µm p-collector 0.5µm 1µm G CG C Fig. 8 Schematic cross-sectional view of a double gate PNM-IGBT 35 V. DISCUSSION The major issue of this control technique is the rise of the saturation voltage of the transition time ("injection control" in Fig. 3). This is simply added as a loss. We must minimize the transition time to minimize the loss. However, Eoff would not be sufficiently decreased if the transition time was too short, because the drift region carrier would not be sufficiently lowered in advance. Therefore, we need to optimize the transition time. The optimum time depends on the application. According to our estimates, it would be just a few microseconds for the lowest over-all loss. Furthermore, we can optimize the CG bias to prevent an increase in unnecessary loss. VI. CONCLUSION We proposed a unique carrier concentration control technique with PNM-IGBT that can improve the further Vce(sat)-Eoff trade-off. This technique requires an adjacent and isolated double gate structure and a minus voltage gate driver. Together, they enable a considerable carrier concentration change instantaneously. Therefore, it is possible to achieve both a lower saturation voltage and lower Eoff. We believe that this combination is going to be a powerful tool to improve the electric conversion efficiency of numerous systems. ACKNOWLEDGMENT The authors wish to thank the Special Experimental Section members in DENSO Research Laboratory who supported us in the fabrication of this unusual device. We also wish to thank all DENSO managers who gave us the opportunity to develop such a challenging device. REFERENCES [1] M. Sumitomo, H. Sakane, K. Arakawa, Y. Higuchi and M. Matsui, “Low loss IGBT with Partially Narrow Mesa Structure (PNM-IGBT)”, Proceeding of ISPSD2012, pp17-20 [2] A. Nakagawa, “Theoretical Investigation of Silicon Limit Characteristics of IGBT”, Proceeding of ISPSD2006, pp5-8 [3] A. Nakagawa, Y. Kawaguchi and K. Nakamura, “Silicon Limit Electrical Charcteristics of Power Devices and ICs”, Proceeding of ISPS2008, pp17-25 [4] M. Takei, S. Fukusuke, H. Nakazawa, T. Naito, T. Kawashima and K. Shimoyama, “DB (Dielectric Barrier) IGBT with Extreme Injection Enhancement”, ISPSD’10 Proceeding, pp.383-386. Fig. 15 Measured Vce(sat)-Eoff relationship Fig. 12 Measured and simulated saturation voltage change Fig. 13 Simulated hole concentration distribution (Vcge is changed) Fig. 14 Measured turn-off waveforms (Vcge is changed) 36 /ColorImageDict > /JPEG2000ColorACSImageDict > /JPEG2000ColorImageDict > /AntiAliasGrayImages false /CropGrayImages true /GrayImageMinResolution 200 /GrayImageMinResolutionPolicy /OK /DownsampleGrayImages true /GrayImageDownsampleType /Bicubic /GrayImageResolution 300 /GrayImageDepth -1 /GrayImageMinDownsampleDepth 2 /GrayImageDownsampleThreshold 2.00333 /EncodeGrayImages true /GrayImageFilter /DCTEncode /AutoFilterGrayImages true /GrayImageAutoFilterStrategy /JPEG /GrayACSImageDict > /GrayImageDict > /JPEG2000GrayACSImageDict > /JPEG2000GrayImageDict > /AntiAliasMonoImages false /CropMonoImages true /MonoImageMinResolution 400 /MonoImageMinResolutionPolicy /OK /DownsampleMonoImages true /MonoImageDownsampleType /Bicubic /MonoImageResolution 600 /MonoImageDepth -1 /MonoImageDownsampleThreshold 1.00167 /EncodeMonoImages true /MonoImageFilter /CCITTFaxEncode /MonoImageDict > /AllowPSXObjects false /CheckCompliance [ /None ] /PDFX1aCheck false /PDFX3Check false /PDFXCompliantPDFOnly false /PDFXNoTrimBoxError true /PDFXTrimBoxToMediaBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXSetBleedBoxToMediaBox true /PDFXBleedBoxToTrimBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXOutputIntentProfile (None) /PDFXOutputConditionIdentifier () /PDFXOutputCondition () /PDFXRegistryName () /PDFXTrapped /False /CreateJDFFile false /Description > /Namespace [ (Adobe) (Common) (1.0) ] /OtherNamespaces [ > /FormElements false /GenerateStructure false /IncludeBookmarks false /IncludeHyperlinks false /IncludeInteractive false /IncludeLayers false /IncludeProfiles true /MultimediaHandling /UseObjectSettings /Namespace [ (Adobe) (CreativeSuite) (2.0) ] /PDFXOutputIntentProfileSelector /NA /PreserveEditing false /UntaggedCMYKHandling /UseDocumentProfile /UntaggedRGBHandling /UseDocumentProfile /UseDocumentBleed false >> ] >> setdistillerparams > setpagedevice


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